About i2s BIT_CLK and SYNCD of NanoBen
kzjeef at gmail.com
Sun Sep 13 07:03:40 EDT 2009
I found some collision in jz4740 programming manual.
programming manual 13.2.1 said about BCKD is
1 = BIT_CLK is generated internally and driven out to the CODEC.
but 13.4.1 said
"" If internal CODEC is used, select 12MHz clock input (via set
proper value in CFCR.I2S and I2SCDR), I2S format (I2SCR.AMSL=0), input
(AICFR.BCKD=0), input SYNC (AICFR.SYNCD=0).""
here BCKD = 0 is internally codec, but 13.2.1 said BCKD = 1 is internal
maybe Ingenic engineer can explain that.
On Sun, Sep 13, 2009 at 6:45 PM, ZhangJieJing <kzjeef at gmail.com> wrote:
> Hi all,
> I 'm checking the initializing instruction of jz4740 sound driver of
> NanoBen, I found I2S register AICFR.BCKD(jz4740 program manual 13.2.1) and
> AICFR.SYNCD are set to 0 in jz4740 i2s driver.
> these two bit's function are:
> BCKD : BIT_CLK Direction. This bit specifies input/output direction of
> 0 = BIT_CLK is input from an external source.
> 1 = BIT_CLK is generated internally and driven out to the CODEC.
> SYNCD: SYNC Direction. This bit specifies input/output direction of SYNC in
> I2S/MSB-justified format.
> 0 = SYNC is input from an external source.
> 1 = SYNC is generated internally and driven out to the CODEC.
> My question is :
> what direction the BIT_CLK and SYNC of ben was ? I just want to ensure the
> is that right.
> Since I have no *oscillograph*, so I cann't sure the CODEC and I2S works
> fine or not, so I just check the init instruction of programming manual.
> Best regards,
> Zhang Jiejing
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