Some Questions on the SIE Xburst-FPGA Interface

Erwin José Lopez Pulgarin erwinkendo at gmail.com
Mon Dec 27 13:19:37 EST 2010


Greetings

Let me see if I am of any assistance.


2010/12/27 Cristian Paul Peñaranda Rojas <paul at kristianpaul.org>

> Hello,
>
> I got a SIE some moths ago, with the idea of work around a data
> aquisition module for a sofware stack implementation for a GPS IF Chip.
>
>
Interesting, I will be waiting to see your results.


> I sucefully implemented the serial to parallel module, in order have
> data represented as 8 or even 16 bits, and now i want transfer it to
> the Xbusrt CPU in SIE, in order to get a raw data and process it latelly.
>
> I was reading the SIE FPGA Xburst docs at QI wiki, but i have some
> questions
> for my particular needs:
>
> Needs:
>
> 1) Send data in just only one way, i mean the Xburst CPU wil read data
> from FPGA (mapped as rom-like device)
>
> 2). The data i'm sending is arranged in 8bits (it could be increased but
> i wanted to stick on the current data-bus width avaliable in SIE Bus)
>
> 3). Data will be transfer at around 1MSPS wich is equivalent to 1MB/s
> with no interrupt
>
> 4). To be sure data is transfered correctly i alredy have a second
> register wich turn to HIGH when data is redy to be read/send.
>
> Questions:
>
> 1) SIE Xbusrt FPGA interface uses a CS and RDWR signal in order to write
> and read, data, write seems not so much deal considering the
> implementation of pulse generator in FPGA. But when talking about
> reading data i may not be fully undertood the process but i have the
> following issues:
>
>         - Data is read as it is but more than once times (from 7 to
>           even 100 !!), i already
>           read parts on ingenic manuals wich refers to SMCR2 register,
>           is still trying with different TAW and TAS bits but still
>           dint get in to it, (any advise about syncking data from
>           timing is wellcome :-))
>
>
I would suggest the buffer approach, even if you use more FPGA "space", it
will give you a good solution. In general, I suggest you try looking at the
Xburst-FPGA Communication example [1], it gives you a good explanation about
what you need.


>
> I also founded a IRQ_F signal wich is wired from FPGA to LCD_15 (Shared
> signal ??) pin in the Xbusrt CHIP, i guess this signal can be used for
> SYNCING data
>

Yes, its an IRQ signal you can implement, maybe with your register going
HIGH you mentioned before or something else. An implementation example is
available here for the FPGA [2].


> to be read from the Xbusrt chip, but even if i get the way to use it
> wichout affect LCM, i'm not sure if IRQ at the data transfer i need is
> the best way or was this signal intented for a soft-irq implementation?
>

Yes, or however you want to use it (I haven't used it so far).


> so far i just saw in the Examples the signal is defined but never used.
>
> Why so much trouble if i can implement a buffer? :-).
>
> Well, i could do that as well and will eliminate my part of my problems,
> but i just wanted to keep a bit simpler my setup, seems not posible at
> all?
>
>
Depends on the eye viewing you design, for me it is a little more complex,
but after using it soo much, I now think its great to use (the primitives of
FPGA are very useful to implement this buffers).

Finally, if you are brave enough, you could see a beta implementation of the
project I am working of robotics (beta is too much to say, it works, but
because for Christmas gift my development system and all my data were
deleted :--(  I couldn't publish the last versions), it expands and use the
control scheme that prof camargo suggested, is a little messy for now (I
didn't delete the build files, rooky git mistake XD ), but it will get
better.[3]

I hope my humble advices and experience could serve you of some good.


>
>
>
>
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>
> [1] http://en.qi-hardware.com/wiki/Xburst-FPGA_communication_example/es
[2]
http://projects.qi-hardware.com/index.php/p/nn-usb-fpga/source/tree/master/Examples/PIC
[3]
http://projects.qi-hardware.com/index.php/p/sie-ceimtun/source/tree/master/Examples/Beta1
-- 
Gracias

Erwin José López Pulgarín
Representante Estudiantil Principal
Coordinador General Grupo CEIMTUN
Ingeniería Mecatrónica
Universidad Nacional de Colombia
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