bitstream secrecy [was: How to Blow $100 Million]
wolfgang at sharism.cc
Sun Sep 5 08:08:21 EDT 2010
no I think this is helpful.
> And what makes the physical silicon so much different from a
> manufactured ROM that contains a GPL executable?
In my limited understanding, I think the silicon, and also the
bitstream (?) are geometrical representations, not binary ones.
Can it be compared to a software like gnuplot and the resulting
graphs? To think this further, if one would print out, on paper,
one page of GPL licensed source codes, and then on another sheet
of paper one page of proprietary source codes, and then glue those
two pages together, would that constitute a GPL violation? Would
this kind of analogy in some way describe what is going on when
Verilog/VHDL source codes get translated into a bitstream or silicon?
At least I think we agree now that using the Lattice Mico32 source
codes is a bona fide attempt at creating a copylefted, GPL licensed
SoC. Keep the feedback coming, technical, legal, everything...
For the bitstream, there is an open slot in the hall of hacking fame
for someone to reverse-engineer the bitstream format of one of the major
FPGA makers, for example the Xilinx bitstream format. We could learn
a lot from such reverse engineering, and eventually it could also help
in gaining the knowledge needed to develop a free synthesizer, free
FPGA, and effective copyleft license.
If you are up to it, get a cheap Xilinx board and start hacking :-)
If you google you can find starting points...
I found one quote from 2007 (source seems offline)
In the world of software running on microprocessors, device vendors
generally publish their product’s bit-stream format in an architecture
manual for use by third-party compiler writers. The roles of chip
designer and compiler writer are effectively decoupled.
In the world of FPGAs, the situation is quite different. Since the
discontinuation of the XC6200 series in 1998, the trend has been
overwhelmingly in the direction of bitstream secrecy. Currently no
major vendor discloses the bitstream format of their device. This has
had the effect of stunting research in several areas, including
partial reconfiguration, evolvable hardware, and fault recovery.
Additionally, alternative design methodologies such as self-timed
circuitry or pausible clocks become difficult to implement properly
if the manufacturer’s tools do not support them."
So: Let's learn more, then we are also better equipped to create or
evaluate effective licenses...
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