ubb-vga: higher, wider, faster ?

Werner Almesberger werner at almesberger.net
Thu Apr 28 20:44:50 EDT 2011

I experimented a bit more with the timing and tried to achieve higher
resolutions. Here's an 800x600 mode:


Here's 1024x768 using the same pixel clock (37.3 MHz):


The artefacts at the right border are FIFO underruns: the CPU cannot
copy data fast enough to the MMC controller to keep up with the
pixel clock. This is more visible in the following image:


This is with a 42 MHz pixel clock. The FIFO underruns cause all sorts
of artefacts.

Full disclosure: thsse high-res modes don't yet work as well as the
screenshots suggest: if I try to display an image with more white
pixels, the monitor still gets confused.

- Werner

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