[Milkymist-devel] Rules on editing schematics (was Re: reviews (was Re: [KiCad M1R4] First KiCad version for Milkymist One Schematics.))

Werner Almesberger werner at almesberger.net
Tue May 8 20:03:00 EDT 2012

Adam Wang wrote:
> Since this
> way, one doesn't need to open CvPcb or Pcbnew to view footprint that which
> pin is which pin. Just look pdf schematic then knows it.

You can achieve that by showing the pin number in the schematics.

> b) if a traditional illustration is common than topside view, then use
> common one. To this, a veteran could easily see details in Pcbnew of KiCad.

Heh, now I feel old ;-)

> As you know, while building footprint(module), this variant can be selected
> well according to real pin assignments.

Hmm, I'd rather not have footprints with varying numbering
schemes. This only leads to great confusion. There are basically
the following choices:

1) schematic symbol shows the package and have pin numbers according
   to the package. Footprint is then "standard". E.g. a diode in
   SOT-23 would go from pin 1 to 3.

2) as above, but the symbol doesn't show the package. This means
   that you need a variant of the "normal" diode symbol that uses
   pins 1 and 3 instead of 1 and 2.

3) all diode symbols use pins 1 and 2, but there are special
   footprints with the changed numbering. E.g., SOT-23-1X2 (or
   whatever one would call it) would have pins 1, unnamed, 2.

4) instead of using numbers, you use names. So the diode symbol
   has pin "numbers" A and C, and the SOT-23-DIODE footprint as

With 1) and 2), you need one symbol per topology. E.g., DIODE,
SCHOTTKY, ZENER, etc., would all need at least one variant
called ...-SOT or maybe ...-13, for connecting from pin 1 to 3.

With 3), you need one special footprint for each "non-standard"
configuration. You can either do this by numbering or by type
of device. By numbering, you'd have SOT-23-1X2, SOT-323-1X2,
SOT-523-1X2, etc. If you go by type of device, it would be
SOT-23-DIODE, SOT-323-DIODE, SOT-523-DIODE, etc.

4) is similar to the "by type of device" variant of 3).

I like 2) the best. It has a good chance of requiring less
duplication than the other approaches, and you see the pin
numbers in the schematics, where they are easy to review.

In 3), you could accidently pick the wrong footprint (e.g.,
SOT-23 instead of SOT-23-1X2) and everything would look almost
correct. Such a mistake would be very easy to overlook during

4) would be safer than 3), but you end up with a lot of
device-specific footprints.

With 3) and 4) you couldn't easily tell which pin is where on
the package, making it difficult to find things in the circuit
with the schematics as a reference.

> Btw, finally i still changed them. :)

Great ! Except that you picked approach 3) :)

I'd also suggest to orient them vertically. You have plenty of
room and the function is even clearer that way.

> J17: changed to a real female socket of front view but with pins on its
> frame. Should be easy to know. One can check DVI wiki or web to know pins
> definition. :)

Yeah, there's just too much information to squeeze in everything.
You could make the pins longer and put names there, but that
might get awakward, too.

> U3: currently its size of pin name and pin number are all 0.05" which same
> as others, so I would keep as it.

"STANDBY", "GND", etc., are 0.04". But yes, I would keep it

> >  - USB*.sch: R136, R137, ... are very crowded. It would be
> >    better to move the resistor value above the symbols (like
> >    for DRAM)
> >
> fixed but not like DRAM. :-)

Heh, even better :-)

> >  - Audio.sch: J26 there, you could even just flip the component
> >    along the X axis, and then have ground point down and 3V3
> >    point up.
> >
> no. :-) I tried to keep all pin 1 of audio connectors to upward. so no
> filp. :-)
> but now similar to J1.

Looks good. One nitpick: J23 and J26 have a LOT of text on them.
I think it would be better to keep only the component reference
and maybe the DNP on top, and move the rest below the component.

If the description is too long, you could split it into two
lines and/or remove "pitch".

> > - FPGA_BANK3.sch: perhaps we should add a table for the revision
> >  codes, similar to what I've done in the lower left corner of
> >  http://projects.qi-hardware.com/schhist/labsw/pdf_head/labsw.pdf
> >
> >
> added.

Excellent, thanks ! Is "none" the same as "DNP" or were there
no version resistors in rc1 ?

- Werner

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