anelok: new and enhanced Y-Box (draft)

Werner Almesberger werner at almesberger.net
Thu Jan 16 09:59:12 EST 2014


I've prepared a draft of the design of the new and greatly enhanced
Y-Box. Schematics:

http://downloads.qi-hardware.com/people/werner/anelok/tmp/ybox-draft-20140116.pdf

Layout:

http://downloads.qi-hardware.com/people/werner/anelok/tmp/ybox-draft-20140116.png


Changes from the old version:

- added KL25 (for USB) and CC2543 (BTLE-capable RF SoC)

- PCB is now 45.1 x 21.6 mm = 974 mm^2 (up from 30.0 x 18.5 mm =
  555 mm^2)

- slot-mounted USB A receptacle should reduce overall case height by
  about 4 mm


General features:

- Freescale KL25 with 48 MHz ARM Cortex M0+, 128 kB Flash, 16 kB RAM,
  basically the same chip as in Anelok, but in a smaller package
  (32-QFN instead of 48-QFN) (1)

- TI CC2543 with (I think) 32 MHz 8051 core, 32 kB Flash, 1 kB SRAM,
  and a 2.4 GHz transceiver that's assumed (2) to be BTLE-capable

- general layout (see the layout image, link above, for details):

  12 o'clock: PC-facing USB Micro B port. PC provides power to Y-Box
  and all that is attached. PC accesses the KL25 for RF communication.
  (3)

  3 o'clock: device-facing USB A (full-size) receptacle. Device
  receives power from PC.

  6 o'clock: Anelok-facing USB Micro B port. Anelok receives power
  from the PC and acts - through the Y-Box - as USB host for the
  device in the USB A receptacle.

  9 o'clock: antenna.

- two brightness-matched LEDs (green for the KL25 and red-orange for
  RF) on PWM-capable I/O pins

- 5 general-purpose test pads on the KL25, 2 on the CC2543. Pads are
  2 mm and each group (4+1+2) is placed with 1.2 mm spacing (which is
  roughly the spacing of ribbon cables)

- large test pads on the bottom with >= 4 mm center-to-center spacing
  give access to power and in-circuit programming interfaces of both
  chips. (4)

- KL25 has access to in-circuit programming signals of the RF SoC

- single-crystal design: the RF SoC has the crystal and provides a
  precision clock (required for USB) to the KL25. (5)

(1) May switch to a KL24/KL25/KL26 with smaller memories in the final
    product. The "big" chip is for development.

(2) The chip is not marketed as BTLE-capable but its capabilities
    suggest that it can be used for it. Some low-level functionality
    that is usually done in hardware, e.g., whitening, may have to
    be done by software.

(3) If all we need is power, the "PC" can be any USB power source.

(4) To be used for a yet-to-be-designed "bed of nails" production
    programming device.

(5) Since the CC2543 may have bad firmware, we cannot rely on it to
    provide the clock on its own. Therefore, the idea is that the
    DFU boot loader in the KL25 will reset the CC2543 and put it in
    debug mode, then command it to output the clock, enumerate, wait
    briefly for "emergency repair" DFU activity, and then jump to
    the application which can release/reboot the CC2543.


Since the Y-Box is now considerably more complex than before, I've
given it its own repository:

https://gitorious.org/anelok/ybox

The analok/ybox repository should be placed at the same level in the
directory hierarchy as the anlok/anelok repository (and all the
Qi-Hardware repos we use.)


I plan to make a first board during the next week, so there is still
plenty of time to review schematics and layout.

After that the firmware has to be written (both for KL25 and CC2543)
and finally the case design will have to be adapted, too. Once
correct operation of the Y-Box is verified, Anelok will switch to the
CC2543 (along with its firmware), too.

Comments ?

- Werner



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